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Peripheral Imaging Corporation
PI400M-A4 400DPI CIS Module Engineering Data Sheet
Key Features * Light source, lens, and sensor are integrated into a single module * 15.7 dpm resolution, 216 mm scanning length * 700sec/line scanning speed @ 5.0 MHz Clock Rate * Wide dynamic range * Analog output * Yellow-Green light source 575nm *Compact size 14.6 mm x 19.5 mm x 232 mm * Low power * Light weight
General Description
The PI400M-A4 is a CIS module. It is a long contact image sensor, using MOS image sensor technology for high-speed performance and high sensitivity. The PI400M-A4 is suitable for scanning A4 size (216 mm) documents with 15.7 dots per millimeter resolution. Applications include document scanning, mark readers, gaming and office automation equipment.
Functional Description
The PI400M-A4 imaging array consists of 27 sensors that are cascaded to provide 3456 photo-detectors with their associated multiplex switches, and a digital shift register that controls its sequential readout. Mounted in the module is one-to-one graded indexed micro lens array that focuses the scanned documents to image onto its sensing plane.
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The on-board amplifier processes the video signal to produce a sequential stream of video at the video output pin of the PI400M-A4 module. Illumination is by means of an integrated LED light source. All components are housed in a small plastic housing which has a cover glass which acts as the focal point for the object being scanned and protects the imaging array, micro lens assembly, and LED light source from dust. I/O to the module is the 10-pin connector located on one end of the module. See Figure 4, Mechanical Structure on the last page. The cross section of the PI400M-A4 is shown in Figure 1 and the block diagram in Figure 2.
DOCUMENT SURFACE
GLASS WINDOW
LIGHT PATH MODULE HOUSE
ROD LENS
D LE
R BA
SENSORS
PCB
INSIDE PICTORIAL OF MODULE
Figure 1. PI400M-A4 Cross Section
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GLED LED LED LED LED LED LED LED LED
VLED
ROD LENS
3454
PHOTO SENSORS
1 2 3 4 5 ----------------
3455
3456
VIDEO LINE
VN(-V)
VDD (+5)
SHIFT REGISTER
GRD
BUFFER
VIDEO AMPLIFIER
VOUT
CP
SP
GRD
Figure 2. PI400M-A4 module block diagram. (See Table 1 below for pin configuration)
Pin Number 1 2 3 4 5 6 7 8 9 10
Symbol Vout Gnd Vdd (+5V) Vn (-5V to -12V) Gnd SP Gnd CP GLED VLED
Names and Functions Analog Video Output Ground; 0V Positive power supply Negative power supply Ground; 0V Shift register start pulse Ground; 0V Sampling clock pulse Ground for the light source; 0V Supply for the light source
Table 1. Pin configuration
Absolute Maximum Rating:
Parameter Power supply voltage Symbols Vdd Idd Vn In VLED ILED(1) Vih Maximum Rating 10 60 -15 10 6V 250 Vdd - 0.5V Units V ma V ma V ma V
Input clock pulse (high level)
PAGE 3 OF 7 - PI400M-A4, 11-15-00
Input clock pulse (low level)
Vil
-0.5
V
Table 2. Absolute Maximum Rating Note (1) LED light source is for current controlled operation. The output video is adjusted to 1.0 Volt maximum, using standard white document - similar to white typing paper.
Environmental Specifications
o Operating Top 0 to 50 (TBD) C temperature(1) Operating Hop 10 to 85 (TBD) % humidity(1) o Storage Tstg -25 to+75 (TBD) C temperature(1) Storage humidity(1) Hstg 5 to 95 (TBD) % Table 3. Operating and Storage Environment Note (1) These are standard specifications for the CIS modules. The TBD is to shows that these parameters will be tested later and added to our data sheet.
Electro-Optical Characteristics (25 C)
Parameter Symbol Number of photo detectors Pixel to pixel spacing Line scanning rate Tint(1) Clock frequency(2) Bright output voltage(3) Bright output nonuniformity(4) Dark nonuniformity(5) Dark output voltage(6) Modulation transfer function(7) Parameter 3456 63.5 864 Units elements m sec MHz Volts % mV mV % Note
@ 4.0 MHz clock frequency
f Video Output Up Ud Dark Level MTF
4.0 1.0 <50 150 100 >30
Table 4. Electro-optical characteristics at 25 C. Definition: (1) Tint: line scanning rate or integration time. Tint is determined by the interval between two start pulses (SP).
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(2) f: main clock frequency also equals the video sampling frequency. (3) Video output level is controlled with LED current source. (4) Up = {[Vp(max) -Vp(min)]/Vp(max)}x100% Where VP(max) = maximum peak pixel and VP(min) = minimum pixel. (5) Ud = Vdmax - Vdmin Vdmin is the minimum output voltage with LED off. Vdmax: maximum output voltage with LED off (6) This level is measured from the reset level that is located between the pixels, during the pixel reset duration. The reset level is at ground, 0V. It can be adjusted with offset potentiometer located on the module. (7) MTF = [(Vp(n) - Vp(n+1)] / (Vp(n)+ Vp(n+1)] x 100 [%] Vp(n): nth maximum output pixel from a 8.0 lp/mm target. V(n+1)th: (n+1)th minimum output pixel from a 8.0 lp/mm target. (8) lp / mm: line pair per mm
Recommended Operating Conditions (25 C)
Item Power Supply Symbol Vdd Vn. Idd ILED VLED Vih Vil f Min 4.5 -4.5 Typical 5.0 -5 Max 5.5 -12 250 Vdd-1.0 0 0.5 +5.0 Vdd-.5 4.0 25 62.5 864 25 Vdd 0.8 5.0 Units V V ma ma V V V MHz % ns s 0 C
Input voltage at digital high Input voltage at digital low Clock frequency Clock pulse high duty cycle Clock pulse high duration Integration time Operating temperature(1)
Tint Top
50
Table 5. Recommended Operating Condition (25 0C) Note (1) see the note under the Table for Operating and Storage Environment.
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Switching Characteristics (25C)
to CP tprh tdh SP tds Vout tsh tdl tw
MODULE TIMING DIAGRAM
Figure 3 The Switching Characteristics (25C) for the I/O clocks are shown in the diagram below. For the timing symbol definitions see the following table below the timing diagram. Item Clock cycle time Clock pulse width Clock duty cycle Prohibit crossing time of Start Pulse(1) Data setup time Data hold time Signal delay time Signal settling time Symbol to tw tprh tds tdh tdl tsh Min. 0.20 50 25 0 20 0 20 100 Typical Max. 2.0 75 Units s ns % ns ns ns ns ns
Table 6. Timing Symbol's Definition and Timing Values. Note: (1) "Prohibit crossing of start pulse" is to indicate that the start pulse should not be active high between any two consecutive high going clock pulse or two consecutive low going clock pulses. See the timing diagram. Only one high going clock under the active high start pulse initiates the internal shift register, and it must not be active over two high going clocks. All low going clock pulses will not initiate the shift register, but to ensure that the start pulse will not be actively high during two consecutive high going clocks, the circuit should be design to keep the start pulse active only for one low going clock cycle.
PAGE 6 OF 7 - PI400M-A4, 11-15-00
Mechanical Structure of the Module
For PI400M-A4 Module's dimensions see the Figure 4 Mechanical Structure.
SC 23 .5 2 82 .5
AN EC
TIO
N
R DI
82
PI
N
1
END VIEW
AE1.65+/- HOLE
1X1-M2 TAPSIZE USE(DP6) 14.6 +/- 0.3 19.5 SIDE TAPE
11.5 +/-0.2
6.0 LIN E
m 2m 10 ctor 1 X onne c
6.8+/-0.2 15.5+/-0.2 THE SURFACE OF THE GLASS
AE2.2+/-0.05 HOLE 2X2-M2.6 TAPSIZE USE (DP6)
R
D EA
MECHANICAL STRUCTURE FIGURE 4
(c)2000 Peripheral Imaging Corporation. Printed in USA. All rights reserved. Specifications are subject to change without notice. Contents may not be reproduced in whole or in part without the express prior written permission of Peripheral Imaging Corporation. Information furnished herein is believed to be accurate and reliable. However, no responsibility is assumed by Peripheral Imaging Corporation for its use nor for any infringement of patents or other rights granted by implication or otherwise under any patent or patent rights of Peripheral Imaging Corporation.
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